1. GETTING STARTED
2. BSDL QUESTIONS
3. PACKAGE QUESTIONS
4. TI DSPs
5. MOTOROLA POWER PC
6. XILINX NOTES
7. ALTERA NOTES
8. DOWNLOAD CABLE QUESTIONS
9. FLASH MEMORY PROGRAMMING HINTS
   
 

====================  GETTING STARTED  ===================

Q: What steps should I take to get a new design up and running quickly using Boundary Scan?
A: See Application Note 001: Scanning Your Own Designs. Also see "Scanning Your Own Designs" 
boundary scan training video clip on the download page.
Q: What do I need to incorporate into my design to use boundary scan?
A: See Application Note 004: JTAG Design Considerations.
   
Q: Are any videos of Universal Scan Boundary Scan Test Software available?
A: Yes, go to Download Page
We have boundary scan test training videos as well as boundary scan tutorials that will help you learn JTAG.
   
Q: Can I Get a 14 day trial version of your Boundary-Scan Test Software?
A: Yes,go to Download Page to download a 14-day trial version on Universal Scan that you can run with your Xilinx, Altera or Lattice JTAG download cables.
  ====================  BSDL QUESTIONS   ===================
Q: Where do I get BSDL files from?
A: Check with part vendor, several links to vendor BSDL's are located on our LINK's page. BSDL's for the demo are on the CD.
Q: My BSDL file won't load - what should I do?
A: E-Mail us a copy! BSDL files are notorious for being error prone. We spend the majority of our time testing Universal Scan with every BSDL file published and find errors all the time. Please send us a copy so we can isolate the issue and get you back on track quickly!
  ===================  PACKAGE QUESTIONS   ===================
Q: I get a "Package Not Found" error.
A: Universal Scan supports hundreds of package types for jtag devices, but every now and then we run across a new one we have not added, or a vendor has named an existing one with a non-standard name. In this case, simply run the Package generator tool under the tools menu to create your own custom package.
Q: Can Universal Scan handle Custom Packages?
A: Yes, Universal Scan has a built in package generator you can use to create any package you want for your jtag testing.
  ====================  TI DSP ISSUES   ===================
Q: I Can�t get my TI DSP to Scan!
A:

Make sure the EMULx pins are tied low during test. These default high, which disables the Boundary Scan mode of the JTAG port and places the part into Emulator mode. NOTE: On these processors the low to high transition of /TRST latches the state of the EMUx pins while TCK is running. So, to get scan running on these processors you need to:

 

   1. Make sure EMU0 & 1 are held low,

   2. Toggle /TRST from low to high and hold it high,

   3. Issue a few TCKs (UniversalScan's soft RESET button [square button with the 'R' in it] or running the

       DEVICE COUNT tool work great for this)

 

Once you have done this the part will now accept Boundary Scan commands and you will be up and running.

 

Check out TI's guide for designing for emulation (SPRU641) for more info:

 http://focus.ti.com/docs/apps/catalog/resources/appnoteabstract.jhtml?abstractName=spru641

   
Q: I Can�t get my TI TMS3206211 DSP to Scan!
A:

See previous FAQ, but also be aware that there were numerous issues with the JTAG chain on this particular part, especially with earlier revs.

 

   Rev 1.0, 1.1, 2.1, 2.2 - Do not support Boundary Scan at all.

   Rev 3.0, 3.1 - Shift DR is captured on falling edge of TCK, effectively creating an extra scan cell in the chain.

 

See TI DSP Erata sheet for details ( http://focus.ti.com/lit/er/sprz154k/sprz154k.pdf)

   
Q: Do you know where I can get an adapter to help simplify interfacing with my TI DSP?

A:

Contact Robert Wallin at: rwallin@visioneeringcorp.com. He has a great little adapter that takes care of

getting the EMU pins setup correctly and toggling TRST at the appropriate time.

   
  ==============  MOTOROLA POWER PC ISSUES   ===============
Q: I Can�t get my Motorola Power PC to Scan!
A: See Application Note 002:  Scanning the Motorola Power PC to learn the trick.
  ==================  XILINX QUESTIONS   ======================
Q: Why won't my Xilinx Spartan or SpartanXL scan after it is configured?
A: These older devices require that you instantiate the "BSCAN" symbol in your design to have access to the boundary scan circuitry after configuration. See page 23 of Xilinx Datasheet DS060 for details. 
Q: How are differential pairs handled in Xilinx Devices?
A: On Xilinx Devices, when you specify an pin as a differential, the scan cells on the N side get disconnected from the I/O and all differential traffic is monitored from the P side scan cells.

The N-Side scan cells are still there, and you can still see (and put values in) the N side scan cells, but they don't do anything.

This all applies to post configuration.  Pre configuration you have total control over all scan cells.
   
Q: Why do things work differently after my Xilinx part is configured?
A: The BSDL files you download from the website are for pre-configuration parts.  When the part is configured, Xilinx disconnects a lot of the boundary scan resources to save power, etc.  For example, if you specify a pin as a dedicated INPUT, then Xilinx disconnects the OUTPUT and TRISTATE scan cells from the pin. The cells are still there, and Universal Scan will let you play with them, but they will have no affect on the physical pin because they have been disconnected as part of the configuration.

Workaround: Specify all INPUT pins as bi-directional with the Tristate tied to a state that will disable the buffer (usually a logic 1).  This way you will still have a dedicated input, but Xilinx won't disconnect the scan cells after configuration so you can still do testing.

Note: Xilinx has a special tool called BSDLAnno that takes your design and creates a new BSDL file that accurately represents your design.  This is primarily for the high end JTAG tools to help them figure out how to generate test vectors.  Universal Scan doesn't have any need for this (the scan chain hasn't actually changed - the same scan cells are still there - just the connectivity of the cells has changed which is one level above where Universal Scan operates.  Remember: Universal Scan allows you to manually manipulate scan cells, not pins.

   
Q: Running ISE7.1i seems to disable the parallel port so Uscan can't run.  Is there a work around??
A:

Xilinx is aware of this issue (it is causing a number of folks grief) and are working on a solution.

In the meantime, here are your options:

1. re-Boot

2. Run iMPACT 6.3.03i, initialize chain, exit iMPACT

3. [Best Option]: Force iMPACT to connect in the PC3 �compatibility mode� before exiting iMPACT

1.       Invoke the following menu item:  Output->Cable Setup

2.       Select the following radio button in the Cable Communication Setup dialog:  Communication Mode = Parallel III

3.       Press OK from the Cable Communication Setup dialog

4.    Exit Impact

   
  ==================  ALTERA QUESTIONS   ======================
Q: Should TCK be pulled up or down?
A:

Since 2000, Altera devices have been designed for a pull DOWN resistor on TCK for both 3.3 and 5V devices.

(Most non-Altera devices tend to expect a Pull UP resistor on TCK)

   
Q: Do Altera Devices scan differently when they are blank vs when they are programmed?
A:

Yes, The tools will disable some scan circuitry in the programmed device if the correct options are not set. See AppNote-005 Enabling Scan cells in configured Altera Devices.

   
  ==============  DOWNLOAD CABLE QUESTIONS   ================
Q: Where can I purchase cables?
A: Go here for a list of vendors.
   
Q: Does Universal Scan support USB?
A: YES! As of Version 9.0, Universal Scan supports several USB cables!. Go here for a list of vendors.
   
 

============  FLASH MEMORY PROGRAMMING HINTS  ===============

Q: I have a 16 Bit Memory device and can't get Universal Scan to find it when I hit INFO.
A: Make sure the addressing is aligned correctly - this may NOT agree with your schematic. Remember: Universal Scan always works with bytes. When you specify "A0" make sure you specify the pin that controls the least significant BYTE.  In 16 bit systems leave this blank and start at "A1" - the signal that controls the least significant WORD.  On your 16 bit schematic may be called "A0.".
Q: I have a 16 Bit Memory device but am only using it in 8 bit mode. How do I set that up?
A: Find the address pin that controls the least significant BYTE of the device.  On some devices that is "A0", on others it is "A-1"  That is the pin that you need to put in the "A0" slot in Universal Scan Flash memory setup dialog.
   

 
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