Click Here to download your  FREE 14 Day Trial of Universal Scan Boundary Scan Software.  

Download a Free trial of Universal Scan Boundary Scan Test Software version 9.5!

  • Monitor JTAG pins in real time on your display!
  • Control JTAG pins with a mouse click!
  • Start debugging your board in minutes!
  • Program Flash and SPI Flash memories!

You supply the Xilinx, Altera, Digilent, Amontec, Spectrum Digital, Lattice or Analog Devices JTAG download cable and you are ready to go!

 

JTAG Training Videos for Universal Scan Software
Now available for FREE download

These technical videos have been used extensively for FAE training.
Now, by popular demand, we are making them available to everyone interested in boundary scan test and flash programming.

Available JTAG Training Videos Time
Getting Started 2 min 9sec
Using Virtual LEDs to see under BGA's 5 min 03 sec
Using Virtual Switches to control JTAG pins 5 min 03 sec
CPLD demo board 4min 54 sec
FPGA demo board 4 min 14 sec
Processor and ASIC board 4 min 27 sec
Troubleshooting your own designs 6 min 10sec
Introduction to Flash Programming 4 min 12sec
Flash Programming Setup 6 min 53sec
SPI Flash Programming                9 min 28sec
Xilinx Spartan3e - Intro 0 min 49 sec
Xilinx Spartan3e - Getting Started 1 min 40 sec
Xilinx Spartan3e - Testing Switches 2 min 07 sec
Xilinx Spartan3e - Testing LEDs 3 min 03 sec
Xilinx Spartan3e - Testing Mode Selects 1 min 59 sec
Xilinx Spartan3e - Testing a Bus 3 min 18 sec
Xilinx Spartan3e - Flash Programming 12 min 37 sec

Xilinx Spartan3e - SPI Flash Programming

  - UniveralScan files used in this demo

6 min 30 sec
Xilinx Spartan3e - Scripting Coming Soon

Please note that video resolution has been reduced to minimize file size. On some PCs, audio may lag video a little. Be sure to maximize your media player for best picture quality.

    Great for New User Training

  • How to use JTAG testing for your new designs!
  • How to monitor pins under BGAs!
  • How to program flash without netlists or special fixtures!
  • Step-by-step instruction with expert narration!

These videos are expertly narrated by Rick Folea, creator of the Universal Scan Software, who has trained hundreds of Field Application Engineers (FAEs) and boundary scan users around the world.

Rick takes you step-by-step through boundary scan test with a clear narration style that anticipates your questions and provides in-depth insights into the JTAG testing process.

JTAG Training Video: "Getting Started"
(2 min 9 sec)

A quick introduction to JTAG testing with Universal Scan software.

Excerpt:
"The Universal Scan Demo Board has 3 JTAG CPLDs in a JTAG chain. A Xilinx 9536, a Lattice 2032 and an Altera 3032...

To add a part to a screen, simply press the Add Device button, navigate your way down the BSDL list, and double click on the device you want. Universal Scan automatically builds me a 44 pin quad flatpack for that device.."

Download: Getting Started
(0.8 meg, Zip file)

JTAG Tutorial - CPLD Demo Board
JTAG Training Video: "Using Virtual LEDs to see under BGAs"
(5 min 03 sec)

How to monitor pin activity under a jtag-compliant BGA device.

Excerpt:
" Monitoring pin activity by watching pins gets old pretty quick,so Universal Scan provides a bunch of virtual LEDs you can connect to the pins to help organize your testing. You can connect to whatever pins you want, change colors as you want. You can specify an LED or a latching LED, and most importantly, you can connect an LED to an input buffer,output buffer or tri-state buffer..."

Download: Using Virtual LEDs
(1.8 meg, Zip file)
JTAG Tutorial - Using Virtual LEDs to see under BGA devices
JTAG Training Video: "Using Virtual Switches to Control JTAG Pins" (5 min 03 sec)

How to control every scan-enabled pin on your boards.

Excerpt:
"Where boundary scan really shines is when you drop a device into EXTEST mode so you can manually control every scan-enabled pin on the device. With Universal Scan you can connect virtual switches to any of the three points in the I/O buffer, although you will usually only want to control the output and the tri-state signals..."

Download: Using Virtual Switches
(1.8 meg, Zip file)
JTAG  Tutorial - Using Virtual Switches to Control JTAG

JTAG Training Video: "CPLD Demo Board"
(4 min 54 sec)

Illustrates JTAG scan chain testing on board with 3 CPLD devices from Altera, Xilinx, and Lattice.

Excerpt:
" The Xilinx is driving a 7 segment display on the board. The Lattice and the Altera are blank. We connected 8 discreet LEDS to the lattice which we are going to monitor with a virtual bar graph LED here and we've also connected and an 8-position DIP switch to the Altera which we are also going to monitor with a virtual bar graph LED.

To run Universal Scan, you just drop the 3 parts on the screen, connect them to a parallel port and hit scan. Instantly, you see what every pin on every device in the JTAG device in your chain is doing in real time on your screen..."

Download:   CPLD Demo Board
(1.9 meg, Zip file)

JTAG Training Video: "FPGA Demo Board"
(4 min 14 sec)

Illustrates JTAG testing with Xilinx PROM and 256 pin FPGA

Excerpt:
"...we have a Xilinx 18V512 PROM in a 44 pin package and 2v40 FPGA in a 256 pin FPGA package.. we've added 4 virtual LEDS to monitor the input buffers of the clock signals on the FPGA design so that in a glance we can see that two of the four clocks are definitely connected to the pins under the BGA. Remember Universal Scan only scans the parts at a 10Hz rate, so you are not going to see a 200 Hz clock...what you will see is a blinking pin (virtual LED), which tells you there is activity at that pin. And let's face it, most of the time, when we put an o-scope probe on the pin, all we really want to know is if the pin is high, low or toggling.

That's what Universal Scan tells us. Its an activity indicator. Its simple, quick and intuitive."

Download: FPGA Demo Board
(1.8 meg, Zip file)
JTAG Tutorial - FPGA Demo Board

JTAG Training Video: "Motorola Processor & Custom ASIC Demo"
(4 min 27 sec)

Illustrates test case of board with Motorola BGA processor and a Custom ASIC.

Excerpt:
" In this example, we have a Motorola processor in a BGA package and a custom ASIC in a Quad flat pack package....quickly and simply with just a jtag download cable and a laptop. We can also see at a glance,
the oscillator is definitely driving the input buffer of the processor and that the crystal is definitely driving the input buffer of the custom ASIC. Because both of these parts are in SAMPLE/PRELOAD mode, we are able to monitor all of this activity without affecting the operation of the circuitry..."

 Download:   Motorola Processor & Custom ASIC Demo
(2 meg, Zip file)
JTAG  Tutorial - Motorola Processor and Custom ASIC

JTAG Training Video: "Troubleshooting Your Own Own Designs"
(6min 10sec)

How to use JTAG test for bringing up new boards.

Excerpt:
" ...Sometimes new designs don't always come up as easily as you'd like. It may be an issue with your board or your hardware scan chain, or you may have the wrong BSDL or the BSDL has errors in it. The good news is that both of these are easy to debug with Universal Scan's built in jtag debug and diagnostic tools... Its a good idea to run these diagnostics on all new boards..."

Download: Scanning Your Own Designs
(2.0 meg, Zip file)
JTAG Tutorial - Troubleshooting your own designs

JTAG Training Video: "Introduction to Flash Programming"
(4min 12sec)

How to program flash without netlists, special test fixtures, executives or anything else traditionally associated with Boundary Scan Test.

Excerpt:
"In this example, we have a flash device connected to this FPGA in the JTAG chain… To program that PROM, we specify the data file, set up the signal pins, bank selects, statics, options and algorithms…in this case, we have we have a data bus that is 8 bits wide, a PROM whose maximum possible width is 8 bits wide and is currently in an 8 bit mode, sitting at ADDR0…"

Download: Introduction to Flash Programming
(1.9 meg, Zip file)
Introduction to JTAG Flash Programming
JTAG Training Video: "Flash Programming Setup"
(6min 53sec)

How to setup flash programming devices with Universal Scan.

Excerpt:
" ..We are using a much larger flash device to show you how size affects programming time…this example has two 16 bit 8 MB Intel PROMS in parallel to form a 32 bit data bus….adding signals is easy - pick the signal you want to add, which device you want to add it to, and what pin you are going to hook it up to.."."

Download: Flash Programming Setup
(2.8 meg, Zip file)
How to setup flash programming using Universal Scan Bundary Scan Test Software

JTAG Training Video: "SPI Flash Programming"
(9min 28sec)

How to program SPI Flash Devices with Universal Scan.

Excerpt:
" ..Programming SPI Flash devices with Universal Scan couldn't be easier - you just setup the SPI Flash Programmer, select a data file and hit PROGRAM! .."

Download: SPI Flash Programming
(7 meg, Zip file)
How to setup flash programming using Universal Scan Bundary Scan Test Software

 
Article Xilinx XCELL - Programming Flash Memory from FPGAs adn CPLDs Using the JTAG Port  

Download Article:

Programming Flash Memory from FPGAs and CPLDs Using the JTAG PortProgramming Flash Memory from FPGAs adn CPLDs Using the JTAG Port
"A new, inexpensive tool from Ricreations makes it simple and easy to program small data files into Flash memory using Boundary Scan."

Appeared in Xilinx XCELL Magazine (Spring '04)

Abstract:
This article provides and in-depth look at the latest innovation to the popular Universal Scan™ Software – inexpensive JTAG flash programming.

 

Article - Got the BGA Blues (PDF file)  explains the use of Universal Scan for board and design debug.

 

 

Download Article:

Got the BGA Blues?Boundary Scan Test White Paper
"Learn how to obtain visibility into the pins of a ball grid array package using Boundary Scan and the Universal Scan debugging tool."

Appeared in Xilinx XCELL Magazine (Summer '03)

Abstract:
This article introduces Universal Scan™– a new tool that takes advantage of IEEE 1149.1 Boundary Scan, commonly known as JTAG, a feature already built into every Xilinx device. It provides visibility and control over the pins under that BGA – or any JTAG device – quickly, easily, and inexpensively.

 
Universal Scan Software Flyer  (PDF File)  

Download Product Flyer:

Universal Scan Boundary Scan Software Boundary Scan Test White Paper

 

 
White Paper - Boundary-Scan paradigm provides virtual access to circuit boards for real-time manual fault diagnosis and stimulus generation  

Download White Paper:

New boundary scan paradigm provides virtual access to circuit boards for real-time manual fault diagnosis and stimulus generation.Boundary Scan Test White Paper

Presented at the IEEE International Mixed-Signal Testing Workshop (IMSTW) June 2001, Atlanta, Georgia.

Abstract:
IEEE Std 1149.1 has enjoyed tremendous success in both IC Manufacturing and large-scale board assembly facilities. The benefits of boundary scan are fully understood and adopted by these industry segments. Boundary scan tools available for circuit card assembly fault-analysis are mature and well integrated into the test flow in these applications. Unfortunately, outside of these tight communities, boundary scan is still largely unknown and not well understood. It is only relatively recently that boundary scan has become available in focused applications such as FPGA downloading and CPLD programming.

Based on work initiated within the GA Tech School of Electrical and Computer Engineering, a new engine has been developed which removes the tedium normally associated with the use of boundary scan. This engine has been wrapped in a user interface which simplifies boundary scan to the point that any bench technician and/or circuit board designer can easily scan a board with little or no formal instruction.

 
       
       

 

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